Nanozeta's Engineering TeamSampling of Experience

With its talented team of engineers and close links to high quality academic institutions, NanoZeta is committed to the pioneering of technological advances in Analog and RF device modeling, circuit design and system architectures. Nano-Zeta continuously invests in IP development to remain in the vanguard of the next generation, high frequency wireless product suppliers.

Senior AMS/RF IC Design Engineer

  • Education: BSc in Physics, PhD in Electronics
  • Businesss Experience: 15 years in Analog/RF/MS IC Design
  • Works and Publications: Participated in projects developing a DDR2/3 PHY, a USB3 PHY, a 60GHz PLL, a great number of low jitter fractional-N/Integer PLLs, de-skewing PLLs and Spread Spectrum Clock generators. Full design flow of analog blocks (OpAmps, BGRs, CPs, VCOs, drivers) and RF Blocks (LNAs Mixers etc). Evaluating IC processes in 28fdsoi, 40nm, 65nm.
  • Author/coAuthor of 35+ pubblications in high level journals and conferences. Co-inventor of 2 patents.

Senior Analog/RF IC Design Engineer

  • Education: BSc in Physics, MSc in Electronics, PhD in Electronics
  • Business Experience: 15 years in Analog/RF/MS IC Design
  • Works and Publications: Participated in projects developing a USB3 and a 60GHz PLL system. Design of high-speed parts, drivers, etc. Evaluating IC process in 65nm. Full design flow of analog blocks (OpAmps, BGRs, Sampling latches, Phase interpolator, drivers). Full design flow of CML high speed blocks and paths in transmitters/receivers.
  • Design of integrated filters for broadband communication. Design of special high-speed (40Gb/s) electronic ICs for optical network applications (serializer part)
  • Author/co-author of 21 publications in high level journals and 9 conference papers. Co-inventor of 1 patent.

Senior Digital IC Design Engineer

  • Education: BSc in Physics, MSc in Microelectronics
  • Business Experience: 8+ years in Digital/Mixed signal IC Design
  • Works and Publications: RTL design and verification of complex digital systems for CMOS imaging applications using a variety of EDA tools. Worked on several projects (cameras, photonic sensors, auto-focus devices) from specification to tape-out in cooperation with major customers. Design and verification of complex digital and mixed-signal ASICs (USB3.0 PHY, DDR2/3 PHY) using a variety of EDA tools. Responsibilities include system design/specification, full RTL-to-GDSII flow with sign-off verification at each step, semi-custom layout using signal integrity aware highspeed techniques,technical documentation.
  • Author or co-author of 2 publications in high level journals and 2 conference papers.

Senior Analog/RF Design Engineer

  • Education: Dipl.-Ing,.MSc in SoC Design
  • Business Experience: 8+ years in Analog/RF/MS IC Design
  • Works and Publications: Power Management Circuit Design and Verification focused mainly on Linear Dropout Regulators and DC-DC Buck converters for mobile phone applications. Free running oscillators, LVDS/SSTL drivers, Continuous Time Linear Equalizers
  • Author or co-author of 2 publications in high level journals and 1 conference paper. Co-inventor of 1 patent.

Senior Analog/RF Design Engineer

  • Education: BSc in Physics, MSc in Electronics, PhD in Electronics
  • Business Experience: 6+ years in Analog/RF/MS IC Design
  • Works and Publications: Bandgap Reference, temperature sensor, class-AB amplifier, buck converter power stage, evaluation/characterization of devices for switching applications. Mixed-signal circuits for power management applications (series linearregulator, POR, Switched-Cap blocks, comparators, OTAs). Mixed-signal circuits for 5Gb/s serial data communication interfaces(Equalizer-TX/RX, DFE, CML Output Driver, CML Buffer, Latch, MUX,DFF,Phase Interpolator). Digital-assisted DC offset cancellation loop. Fully-balanced OTA-C 7th-order 100MHz Elliptic lowpass filter for Powerline AFE. 300MHz, 60dB-linear PGA with 1.4dB step for Powerline AFE
  • Author/Co-author of 18 papers in refereed international journals and conferences.

Mid-level Analog IC Design Engineer

  • Education: BSc in Physics, MSc in Electronics
  • Business Experience: 4+ years in Analog/RF/MS IC Design
  • Works and Publications: Analog/RF IC and physical design using EDA tools. Electrical Design, Physical Design and Verification of a USB2.0 UTMI transceiver. Design of a wideband (65MHz to 3GHz) LNA for ITU-T G.hn (G.9960 and G.9964) applications with variable gain, low noise figure and high linearity. Design of a 1GHz Low-Voltage Differential Signaling driver/receiver. Design a 6-bit flash ADC at 1.7, 2.5, and 5GHz sampling rates, implementaing in 1.2V using a new offset calibration technique.
  • Author or co-author of 2 conference papers.